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Chip structure, wafer structure & process of fab... [(10)I470766]

[Category : - ELECTRONICS]
[Viewed 84 times]

A chip structure including a substrate and a stress buffer layer is provided. The substrate has a first surface and a second surface opposite to the first surface. The stress buffer layer is disposed on the peripheral of the substrate and located in at least one of the first surface and the second surface of the substrate.

Patent publications:

 TW 201034162
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Seller:

rayfw (Taiwan)

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