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METHOD FOR MAKING A CHIP PACKAGE [(10)I401752B1]

[Category : - ELECTRONICS]
[Viewed 62 times]

The present invention relates to a method for making a chip package. The method for making the chip package includes: (a) providing a substrate with at least one via; (b) disposing the substrate on a carrier; (c) removing part of the substrate so as to expose the via and form a through via; (d) disposing a plurality of chips on the surface of the substrate, wherein the chips are electrically connected to the through via of the substrate; (e) forming an encapsulation; (f) removing the carrier; (g) conducting a flip chip mounting process; (h) removing the encapsulation; and (i) forming a protective material. Therefore, the carrier and the encapsulation can avoid warpage of the substrate during the manufacturing process.

Patent publications:

TW 201123318

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rayfw (Taiwan)

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