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Semiconductor package with lateral signal lines

[Category : - ELECTRONICS]
[Viewed 168 times]

The invention relates to a semiconductor package and a manufacturing method thereof. The semiconductor package comprises a first chip, an interposer substrate, a second chip, a package and a signal line. The first chip comprises an active surface and a non-active surface which are opposite to each other. The interposer substrate comprises a first surface and a second face which are opposite to each other, and a signal electric conductive hole, and the second surface is arranged on the active surface of the first chip. The second chip is arranged on and electrically connected with the first surface of the interposer substrate. The package coats the first chip and the second chip and comprises an outer lateral surface, and the signal electric conductive hole of the interposer substrate exposes from the outer lateral surface of the package. The signal line is arranged on the outer lateral surface of the package and is electrically connected with the exposed signal electric conductive hole and the active surface of the first chip.

Patent publications:

CN 105514086

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rayfw (Taiwan)

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