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Parallel, pipelined, integrated-circuit of a computational engine

[Category : - Audio - Video]
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Embodiments of the present invention are directed to parallel, pipelined, integrated-circuit implementations of computational engines designed to solve complex computational problems. One embodiment of the present invention is a family of video encoders and decoders ("codecs") that can be incorporated within cameras, cell phones, and other electronic devices for encoding raw video signals into compressed video signals for storage and transmission, and for decoding compressed video signals into raw video signals for output to display devices.; A highly parallel, pipelined, special-purpose integrated-circuit implementation of a particular video codec provides, according to embodiments of the present invention, a cost-effective video-codec computational engine that provides an extremely large computational bandwidth with relatively low power consumption and low-latency for decompression and compression of compressed video signals and raw video signals, respectively.

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Our patented Video CODEC has the lowest power dissipation (25 mW) and lowest latency (698 uS) in the industry.

Patent publications:

US 8660193

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bringtech (Canada)

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